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Adiuvo Engineering website

Company blog · adiuvoengineering.com/posthardwareprogramming

Adiuvo Engineering website is the company blog at adiuvoengineering.com, writing about hardware and programming. Since 2022, 6 different Hacker News readers have linked it 44 times. It is still writing: the last post was on 2026-10-28, and you can follow it by feed.

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44mentions?
6HN people?
2022–2026first – last linked?
Links on Hacker News per year · peak 22 in 2024

The Embedded and FPGA specialists

What Hacker News says?

  1. Submitted The FPGA turns 40 as a story · 166 points

    HN discussion
  2. Submitted Understanding Linear Feedback Shift Registers in FPGAs as a story · 74 points

    HN discussion
  3. Submitted FPGA, PCIe and XDMA – Building and Testing AMD SW Drivers as a story · 41 points

    HN discussion
  4. Submitted Understanding DFT and FFT as a story · 29 points

    HN discussion
  5. Submitted The Cordic Algorithm, Theory and FPGA Uses as a story · 23 points

    HN discussion
  6. Submitted Lots of resources to get started learning FPGA as a story · 3 points

    HN discussion
  7. Submitted GateMate European FPGA and open source tool chain as a story · 3 points

    HN discussion
  8. Submitted Fast Fourier Transform from Scratch as a story · 2 points

    HN discussion
  9. Submitted Image Processing in FPGA with Simulink and Versal as a story · 2 points

    HN discussion
  10. Submitted Boundary Scan in AMD FPGAs as a story · 2 points

    HN discussion
  11. Submitted FPGA Conference in UK as a story · 2 points

    HN discussion
  12. Submitted Cordic Algorithm from Scratch in FPGA as a story · 2 points

    HN discussion
  13. Submitted Deep dive of Agilex 5 Architecture as a story · 2 points

    HN discussion
  14. Submitted Not Just for AI, Developing for AMD Versal AI Engines Using Simulink for 2D FFTs as a story · 2 points

    HN discussion
  15. Submitted Using Embedded Linux for Motor Control on FPGA as a story · 2 points

    HN discussion
  16. Submitted Versal AI Edge – FPGA and AI Accelerate at more sensible price point as a story · 2 points

    HN discussion
  17. Submitted IT Infrastructure and Tools for a FPGA Start Up as a story · 2 points

    HN discussion
  18. Submitted Vitis Moves from Eclipse to VSCode as a story · 2 points

    HN discussion
  19. Submitted MicroZed Chronicles: A weekly blog exploring aspects of FPGA design as a story · 2 points

    HN discussion
  20. Submitted Embedded Linux UIO and AMD FPGA as a story · 2 points

    HN discussion
  21. Submitted Using RPI Pico for System and FPGA Integration as a story · 2 points

    HN discussion
  22. Submitted Debugging FPGAs with Python as a story · 1 points

    HN discussion
  23. Submitted A look at working with AMD Alveo accelerators and Python as a story · 1 points

    HN discussion
  24. Submitted Learn about AMD Versal, Network on Chip and Ddrmc as a story · 1 points

    HN discussion
  25. Submitted A Look at the OpenNIC a SmartNIC from AMD as a story · 1 points

    HN discussion
  26. Submitted PCEi, AMD FPGA, DMA and How to Write the SW as a story · 1 points

    HN discussion
  27. Submitted Debugging AMD Versal as a story · 1 points

    HN discussion
  28. Submitted Understanding PCIe Base Address Registers – Using Alveo as an Example as a story · 1 points

    HN discussion
  29. Submitted Adding HDL into Vivado IP Integrator Cleanly as a story · 1 points

    HN discussion
  30. Submitted Auto Running Scripts and Applications in Embedded Linux as a story · 1 points

    HN discussion

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