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Dave's Hacks
Personal blog · daveshacks.blogspot.comhardwareprogramming
Dave's Hacks is a personal blog at daveshacks.blogspot.com about hardware and programming. Since 2010, 10 different Hacker News readers have linked it 12 times, most often “Inside the ALU of the armv1 – the first ARM microprocessor”. It is still writing: the last post was on 2025-12-09, and you can follow it by feed.
Too few sampled comments (8) to say how often HN recommends it.?
Why HN links it
HN readers link this blog for its reverse-engineering write-ups of the original ARM1 processor, covering its ALU, registers and instruction logic, alongside a Visual ARM1 simulator. One commenter called these posts well written.
Summarised by Claude from a sample of 8 HN comments that link here. Each comment is marked recommending, critical or neutral (citing without judging); how this works.
Most-linked posts?
- Inside the ALU of the armv1 – the first ARM microprocessor3 people · 3 mentions · first linked 2015-12-22
- /2015/12/inside-alu-of-armv1-first-arm.html3 people · 3 mentions · first linked 2018-09-26
- /2016/01/inside-armv1-instruction-decoding-and.html2 people · 2 mentions · first linked 2018-12-07
What Hacker News says?
Also these series of blog posts describe what's going on in the Visual ARM1 simulator and they are both really really well written: - http://www.righto.com/2015/12/reverse-engineering-arm1-ances... - http://daveshacks.blogspot.com/2015/12/inside-armv1-register...
Comment linking /2015/12/inside-armv1-register-bank.html
on “Ask HN: How to Self-Study Integrated Circuit Design?”Submitted Hacking the im-me (2010) as a story · 10 points
HN discussionI am more familiar with the F18A predecessors, such as the F21, than with this design. So it is quite possible that it is a proper asynchronous processor even if the older ones were not. I am biased by some confusion I observed about the F21. There are two ways to design an ALU: an efficient solution is to combine the inputs and control signals using as little logic as possible to generate the results or to have a s…
Comment linking /2015/12/inside-alu-of-armv1-first-arm.html
on “Flow Computing aims to boost CPUs with ‘parallel processing units’”Submitted Inside the ALU of the armv1 – the first ARM microprocessor as a story · 2 points
HN discussionOops - in the analysis of the PLA2 in the ARM1 there are both the load/store multiple instructions and the coprocessor stuff. In fact, together they take up about half of the logic. So I was remembering it wrong, then. http://daveshacks.blogspot.com/2016/01/inside-armv1-instruct...
Comment linking /2016/01/inside-armv1-instruction-decoding-and.html
on “ARM1 Gate-level Simulation”Submitted Reverse engineering the firmware on the im-me. (fravia would be pleased) as a story · 2 points
HN discussionI wrote several articles about the ARM1 when this simulator was released in 2015. A better article to start with is: http://www.righto.com/2015/12/reverse-engineering-arm1-ances... Dave Mugridge also wrote some articles about the ARM1, focusing more on the ALU and registers: https://daveshacks.blogspot.com/2015/12/inside-alu-of-armv1-...
Comment linking /2015/12/inside-alu-of-armv1-first-arm.html
on “ARM1 Gate-level Simulation”Submitted The ALU of the armv1 – the first ARM microprocessor (2015) as a story · 1 points
HN discussion> The design of the orginal ARM ISA is very interesting historically Also very interesting is to see how it was originally implemented (a series of blog posts by Ken Shirriff and Dave Mugridge): https://www.righto.com/search/label/arm and https://daveshacks.blogspot.com/2015/12/inside-alu-of-armv1-...
Comment linking /2015/12/inside-alu-of-armv1-first-arm.html
on “ARM Assembly Is Too High Level: ROR and RRX”I wouldn’t say it didn’t have any microcode. It actually had a small PLA for sequencing the multi-cycle instructions. [0] I don’t think anyone would actually label it as microcode (not when the entire point of RISC was to avoid microcode) they would call it a sequencer or finite state machine; But really it’s the same thing. It’s certainly much simpler than the full microcode of any contemporary CISC, and the bulk o…
Comment linking /2016/01/inside-armv1-instruction-decoding-and.html
on “80386 Microcode Disassembled”Amazing job with the ASCII gate layout :-) Here's a link to the real layout: https://lh3.googleusercontent.com/-vsyhirk5hFU/VrgVJMXZDyI/A... Note how insanely optimized the hand layout of the Z-80 is. The ARM1 has some compound gates. but I haven't come across anything more complex than OR-NAND. It's mostly built from standard cells. The layout is kind of awful compared to the 6502 or Z-80, but the ARM designers wer…
Comment linking /2016/01/inside-armv1-read-bus-b-alu-output-bus.html
on “The ARM1 processor's flags, reverse engineered”> seems like x86 and the major 8bit cpu's had the same speed, pondering in this might be a remnant from the 4-bit ALU times. I think that era of CPUs used a single circuit capable of doing add, sub, xor etc. They'd have 8 of them and the signals propagate through them in a row. I think this page explains the situation on the 6502: https://c74project.com/card-b-alu-cu/ And this one for the ARM 1: https://daveshacks.b…
Comment linking /2015/12/inside-alu-of-armv1-first-arm.html
on “XOR'ing a register with itself is the idiom for zeroing it out. Why not sub?”
