Top all-time · #11396
Jack Whitham
Personal blog · jwhitham.orgprogrammingsystems
Jack Whitham's personal blog at jwhitham.org covers programming and systems. Since 2017, 7 different Hacker News readers have linked it 16 times. It is still writing: the last post was on 2025-07-16, and you can follow it by feed.
Too few sampled comments (3) to say how often HN recommends it.?
Why HN links it
Jack Whitham's posts cover porting third-party programs to TempleOS, RISC instruction sets, and assembly-level CPU design. HN readers link them as a getting-started guide for TempleOS hacking and as a counterpoint on SPARC coding.
Summarised by Claude from a sample of 3 HN comments that link here. Each comment is marked recommending, critical or neutral (citing without judging); how this works.
Experienced professional software engineer based in York, UK
Most-linked posts?
- /2016/02/risc-instruction-sets-i-have-known-and.html2 people · 8 mentions · first linked 2018-12-17
- /2015/07/porting-third-party-programs-to-templeos.html2 people · 2 mentions · first linked 2017-12-04
What Hacker News says?
For those thinking about hacking on TempleOS, here's Jack Whitham getting started: https://www.jwhitham.org/2015/07/porting-third-party-program...
Comment linking /2015/07/porting-third-party-programs-to-templeos.html
on “Terry Davis has died”Submitted Porting third-party programs to TempleOS as a story · 6 points
HN discussionI don't program in assembler professionally, but I understand that MIPS has some ugly, ugly aspects: https://www.jwhitham.org/2016/02/risc-instruction-sets-i-hav... Sun opened the SPARC T2 a decade ago, and it certainly has not become popular: https://www.oracle.com/technetwork/systems/opensparc/openspa... It does seem that RISC-V corrects a number of these design eccentricities. SPARC did not move the market an inc…
Comment linking /2016/02/risc-instruction-sets-i-have-known-and.html
on “MIPS Goes Open Source”Submitted Review: UndoDB, a Reversible Debugger (2015) as a story · 2 points
HN discussionMIPS had a few architectural eccentricities, like branch delay slots, that were tuned to the original design to make it fast. These eccentricities eventually became a liability. https://www.jwhitham.org/2016/02/risc-instruction-sets-i-hav...
Comment linking /2016/02/risc-instruction-sets-i-have-known-and.html
on “SoftBank's Sale of Arm to Nvidia Collapses, Arm to IPO”Submitted Profiling versus Tracing (2016) as a story · 1 points
HN discussion> This is awesome!!! (Ultra)SPARC CPU's are a joy to code for in assembler, Dr Jack Whitham disagrees: > https://www.jwhitham.org/2016/02/risc-instruction-sets-i-hav...
Comment linking /2016/02/risc-instruction-sets-i-have-known-and.html
on “Compiling my own SPARC CPU inside a cheap FPGA”Allow me to introduce you to register windows. https://www.jwhitham.org/2016/02/risc-instruction-sets-i-hav...
Comment linking /2016/02/risc-instruction-sets-i-have-known-and.html
on “GlobalFoundries to Acquire MIPS”TempleOS has many interesting features, but remember that TempleOS is rather different at a very fundamental level. Meaning, both kernel and userland run on a privileged ring, the file system has no permissions, etc. This is not a flaw but it is rather by design. This is a paradigm that might be incompatible to that of Linux. However, I think there is potential for porting things. Some good articles about Temple OS…
Comment linking /2015/07/porting-third-party-programs-to-templeos.html
on “Mal Lisp for TempleOS”Admiration for SPARC and MIPS is not universal, and there were interesting warts on these early designs that did not age well. https://www.jwhitham.org//2016/02/risc-instruction-sets-i-ha... https://news.ycombinator.com/item?id=11607119
Comment linking //2016/02/risc-instruction-sets-i-have-known-and.html
on “ARM: Pragmatism, Not Purity”Obligatory mention: "RISC instruction sets I have known and disliked." https://www.jwhitham.org//2016/02/risc-instruction-sets-i-ha... https://news.ycombinator.com/item?id=11607119 I might also say that Sun's UltraSPARC was constantly beaten by Fujitsu SuperSPARC. It would have been better to outsource.
Comment linking //2016/02/risc-instruction-sets-i-have-known-and.html
on “The Worst CPUs Ever Made (2021)”Global Foundries just bought MIPS, so perhaps there is life in the old architecture yet. https://gf.com/gf-press-release/globalfoundries-to-acquire-m... Edit: the article starts with the above press release. It spends substantial time on the Nintendo 64, but not much on the "Emotion Engine" of the Sony PS2 (which was a more advanced MIPS CPU). https://en.wikipedia.org/wiki/Emotion_Engine There was some design oddnes…
Comment linking /2016/02/risc-instruction-sets-i-have-known-and.html
on “MIPS – The hyperactive history and legacy of the pioneering RISC architecture”I've wondered why MIPS didn't conquer the high and the low. The difficulties of the instruction set might have had a hand. https://www.jwhitham.org/2016/02/risc-instruction-sets-i-hav...
Comment linking /2016/02/risc-instruction-sets-i-have-known-and.html
on “IRIX Introduction”SPARC and MIPS have some architectural oddities that were designed for their original pipelines that make them awkward. https://www.jwhitham.org//2016/02/risc-instruction-sets-i-ha... https://news.ycombinator.com/item?id=11607119
Comment linking //2016/02/risc-instruction-sets-i-have-known-and.html
on “MIPS provides highly scalable RISC processor IP”Your opinion of MIPS assembler is not universally held. https://www.jwhitham.org/2016/02/risc-instruction-sets-i-hav... https://news.ycombinator.com/item?id=11607119
Comment linking /2016/02/risc-instruction-sets-i-have-known-and.html
on “Can SGI’s Enthusiast Community Bring IRIX Back to Life?”Here is salient commentary on register windows, and other bad ideas from early RISC (from the perspective of debugging assembly language). https://www.jwhitham.org/2016/02/risc-instruction-sets-i-hav...
Comment linking /2016/02/risc-instruction-sets-i-have-known-and.html
on “The RISC Wars Part 1: The Cambrian Explosion”
